Aerospace_ FPGA Verification - Heidelberg, Deutschland - Quest Global

    Quest Global
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    Beschreibung

    We are Quest Global. We're in the business of engineering, but what we're really building is a brighter future. It's not just what we do, but why we do it that makes us different. We believe engineering has the unique opportunity to solve the problems of today that stand in the way of tomorrow. For 25 years, we have strived to be the most trusted partner for the world's hardest engineering problems. As a global organization headquartered in Singapore, we live and work in 17 countries, with 56 global delivery centers, driven by 17,500+ extraordinary employees who make the impossible possible every day.

    Quest Global brings deep industry knowledge and digital expertise to deliver E2E global product engineering services. We bring together technologies and industries alongside the contributions of diverse individuals and their areas of expertise to solve problems better, faster. This multi-dimensional approach enables us to solve the most important and large-scale challenges across the Aerospace & Defense, Automotive, Energy, Hi-Tech, Healthcare, Medical Devices, Rail and Semiconductor industries.

    Roles & Responsibilities

    Quest is currently participating in the testing of an aerospace data manager device and is seeking FPGA UVM Verification Engineers.

    This Engineer will be joining the existing team who is establishing the UVM (Universal Verification Methodology) environment and is a seasoned group of engineers:

    • Verification experience
    • Needs to have a good working knowledge of UVM, in the area of script development
    • Must be self-motivated and have a lot of initiative to reach out an interact with the existing team
    • Individual that has working knowledge of digital systems, and components, FPGA design methodologies, testing, debugging, root causing and testing methodologies.
    • Experience with DO254 Dal A development

    Required Qualifications:

    • Ability to Construct FPGA Test Bench using UVM Components.
    • System Verilog
    • Sequence Development
    • Developing DO254 related documents including but not limited to: Test Plans, Test Procedures, Test Cases, Maintaining a Trace Matrix
    • Troubleshooting RTL Design Flaws using Simulation Environment.
    • Ability to take a problem and come up with a solution.
    • Familiarity with Unit level testbenches
    • Familiarity with Chip Level testbenches

    Preferred Skills:

    • Develop UVM Predictors and Scoreboards to Implement Self-Checking Simulation Tests.
    • Familiarity with Register Modeling and Predicting Register Behavior.
    • Proficiency in developing UVM Agents, Drivers, Monitors, and Sequence Items.
    • Code Coverage Analysis for RTL Source (Statement, Branch, FSM, FSM Transition)

    Technologies & Tools:

    • SVN
    • Mentor Graphics Questasim
    • Verilog
    • VHDL

    Our Benefits

    • Unlimited employment with individual training and development opportunities
    • Flexible working hours including overtime compensation
    • Exciting projects at a high technical level
    • Strong teams with an open and friendly working atmosphere as well as flat hierarchies
    • New and modern equipped office building
    • Attractive company pension schemes
    • A subsidized membership with Urban Sports Club
    • Regular employee events (Summer party, Christmas party)

    By submitting my application, I agree that Quest Global Engineering Service GmbH may collect, store and process my data for the purpose of reviewing my application and for up to 750 days thereafter.