- Collaborate with Design Engineers to verify and validate circuit designs
- Create design verification plans based on specifications
- Manage and schedule projects for timely completion
- Utilize cutting-edge techniques, tools, and technologies for verification activities
- Maintain the verification environment, identify and resolve design issues
- Develop verification methodologies and implement standard debug processes
- Participate in design evaluations
- Over 5 years' experience in the semiconductor industry
- Graduate in Electronics and Electrical Engineering or a related field
- Proficient in digital design verification using standard methodologies like UVM
- Experience in simulating mixed-signal designs with Verilog models is advantageous
- Familiarity with SerDes technology is a plus
- Knowledge of SystemVerilog Assertions (SVA) and formal verification is beneficial
- Skilled in developing constrained random testbenches
- Successful track record in verifying complex designs, preferably in high-volume ASIC applications
- Familiarity with high-level protocols such as PCIe, USB, and DP is an additional benefit
- Strong understanding of simulation tools and debugging methods
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Digital Verification Engineer - Dortmund, Deutschland - European Recruitment
Beschreibung
Digital Verification Engineer
An exciting opportunity for an experienced Digital Verification Engineer to join a leading Fabless Semiconductor company, known for their innovation in high-speed and energy-efficient chip-chip link solutions.
You will be part of a team that plays a crucial role in driving the advancement of the electronics sector, constantly evolving to meet the needs of customers.
Location Options: Dortmund (Germany), Lausanne (Switzerland), or Northampton (UK).
Key Responsibilities:
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