- Learn analog layout implementation flow using Cadence Virtuoso XL
- Transistor level layout of analog specific blocks
- Acquire experience in analog layout matching technique and define block level matching requirements in collaboration with design engineer
- Floor planning, align block level definition with top level requirement
- Layout verification (Design Rule Check, Layout vs. Schematic)
- Understand database structure and revision control system
- Learn about the complete design flow of an IC until mask generation
- Completed 4 or 5 semester of Bachelor study in Electrical Engineering or Computer Engineering
- Basic knowledge and understanding of semiconductor technology and electronics
- Experience with LINUX, scripting and programming
- Track record of on-time completion of technical projects - in academia or as hobby
- High self-motivation with good communication and teamwork skills
- Willingness to learn and accomplish tasks independently
- Strong verbal and written communication skills in English, German is a plus
- Experience in working in team
- Knowledge of IC layout tools (Cadence IC Design Suite) is a strong plus
- Good troubleshooting and debugging skills
- Benefit from an attractive compensation
- Join an international work environment where your ideas count and where you can thrive in a diverse culture
- Explore a world of opportunities for your personal and professional development Texas Instruments is an equal opportunity employer and supports a diverse, inclusive work environment.
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IC Layout Engineering Intern m/f/d - Freising, Deutschland - Texas Instruments
Beschreibung
About the Job
Do you study engineering and want to apply your skills and knowledge in the advanced field of Integrated Circuits? Do you like to solve geometrical puzzles? Have you found yourself immersed in navigating game mazes and labyrinths, carefully mapping their pathways and connections in your mind? If you answered yes to these questions – this internship might be for you Our challenging analog and mixed signal designs are used in systems that drive the energy transformation – from photo-voltaic to electrical mobility. We use proprietary advanced BiCMOS process technologies and achieve best in industry performance with innovative design and careful attention to details. In this internship you will work together with experienced layout engineers and design team to learn and implement layout of analog and mixed signal integrated circuits.
Please note that this position is not in design, but in IC Layout. If you are a Masters student with knowledge and interest in Analog or Digital Design – please apply for TI's Design Engineering Internships.
Your responsibilities include:
Physical layout and layout verification of high-performance analog and mixed signal circuits in BICMOS technologies.
Minimum requirements:
Preferred qualifications:
Our offer for you:
